1. Field of the Invention
This invention relates to a semiconductor logic circuit comprising of two logic circuit sections, that is, a first-stage logic circuit section and a second-stage logic circuit section, and particularly, to a semiconductor logic circuit including dynamic logic elements.
2. Description of the Prior Art
A prior semiconductor logic circuit comprising of two logic circuit sections, that is, a first-stage logic circuit section and a second-stage logic circuit section, is briefly described below. The first-stage logic circuit section comprises of a first precharging transistor which is connected to a power terminal and turns on/off in response to a clock signal, a first grounding transistor which is connected to the ground and also turns on/off in response to a clock signal, and a first logic element which has the grounding end connected to the grounding transistor and the output end connected to the precharging transistor and performs a given logic operation on a first input signal to make the result available at the output end. The second-stage logic circuit section comprises of a second precharging transistor which is connected to a power terminal and turns on/off in response to a clock signal, a second grounding transistor which receives an output signal of the first logic element to turn on/off, a third grounding transistor which is connected to the ground and to the second grounding transistor in serial and receives a clock signal to turn on/off, and a second logic element which has the grounding end connected to the second grounding transistor and the output end connected to the second precharging transistor and performs a given logic operation on a second input signal to make the result available at the output end.
The operating speed of each logic element depends on the time required for dynamically held electric charges to be discharged by the transistors inside the logic element and the grounding transistor connected to the logic element.
Another prior semiconductor logic circuit includes two or more first-stage logic circuit sections. The outputs of those first-stage logic circuit sections are supplied to two or more second grounding transistors of a second-stage logic circuit section which includes two or more logic elements. A first precharging transistor for each of the first-stage logic circuit sections and a third grounding transistor of the second-stage logic circuit section receive a clock signal CLK.
The prior semiconductor logic circuits as described above require a large circuit to generate clock signals because a clock signal must be supplied to the precharging and grounding transistors of both the first-stage and the second-stage logic circuit sections. Because of the two serial-connected grounding transistors, the logic element of the second-stage logic circuit section takes a longer time to discharge electric charges, resulting in a lower operating speed of the second-stage logic circuit section.